Module 1
Introduction, System Design Methodologies & Models: - System-Design Challenges Abstraction Levels ,System Design Methodology, System-Level Models Platform Design System Design Tools. System Design Methodologies- Bottom-up Methodology,Top-down Methodology, Meet-in-the-middle Methodology Platform Methodology Field Programmable Gate Array( FPGA) Methodology System-level Synthesis Processor Synthesis. Models-Models of Computation, System Design Languages, System Modeling, Processor Modeling, Communication Modeling, System Models
Module 2
System Synthesis:-System Design Trends, Transaction Level Model(TLM) Based Design, Automatic TLM Generation, Automatic Mapping Platform Synthesis, Software synthesis- Preliminaries, Software Synthesis Overview, Code Generation, Multi-Task Synthesis, Internal Communication, External Communication, Startup Code, Binary Image Generation Execution
Module 3
Hardware synthesis:- Register Transfer Logic(RTL) Architecture, Input Models Estimation and Optimization, Register Sharing, Functional Unit Sharing, Connection Sharing, Register Merging, Chaining and Multi-Cycling, Functional-Unit Pipelining, Datapath Pipelining, Control and Datapath Pipelining, Scheduling Interface Synthesis
Module 4
Verification:- Simulation Based Methods, Formal Verification Methods, Comparative Analysis of Verification Methods, System Level Verification . Embedded Design Practise -System Level Design Tools, Embedded Software Design Tools, Hardware Design Tools, Case Study
References
- Daniel D. Gajski , Samar Abdi Andreas and Gerstlauer Gunar Schirner , “Embedded System Design Modeling, Synthesis & Verification”, Springer, 2009
- A. Jantsch, Morgan , “Modeling Embedded Systems and SoCs - Concurrency and Time in Models of Computation”, Kaufmann, 2003.
- Computers as Components-principles of Embedded computer system design, Wayne Wolf , Elseveir, 2005
- Discrete-Event System Simulation, J. Banks, J. S. Carson II, B. L. Nelson, and D. M. Nicol, Prentice-Hall, 2001.