Dhanesh M S Assistant Professor in Electronics and Communication

DHANESH . M . S

                                                                                                         

Location: Kollam         

 Mob: + (91) 9746806221

e-mail:dhaneshmuralee@gmail.com

 

Career Aspirations

 Looking for a Challenging and Responsible position in a quality environment that offers professional growth, where I could use my extensive knowledge and talents to deliver solutions successfully.

 

Academic Profile

  • M.tech(Electronics)(2010-2012) with specialization in VLSI and Embedded system from Cochin University Of Science and Technology,Kerala with CGPA 8.4.
  • B Tech (Electronics and Communication) (2006-2010)from Cochin University Of Science and Technology, Kerala with 73.27 % . 
  • Plus Two (2003-2005) from Kerala Board Of Higher Secondary Examination with Distinction (87%).
  • S S L C (2002-2003) from Board of Public Examinations, Kerala with Distinction (90%).
 

Teaching Experience

7 yr 5 months (june 2012-present) as Asst.Prof( Dept.ECE ) in Rajagiri School of Engineering and technology, Kakkanad.

Industrial Training

6 months industrial training from July 2017 to December 2017 at Digital core Technologies Pvt. Ltd.

Papers Presented

·         Design of Configurable Filters for Image processing, proceedings of NCVPS,16th November 2011 
·         FPGA based Implementation of Image processing Algorithm, proceedings of  RETREW 12, 20th march 2012
·         An efficient way to implement Scalar Multiplication in Elliptic Curve Cryptography, IJERT Special Issue 2017, ISSN: 2278-0181
·         A body biased adiabatic dynamic differential logic(BADDL) to prevent DPA attacks in smart cards, IEEE ISBN: 978-1-5386-2745-7
·         Design of graphics processing unit for image processing, IEEE ISBN: 978-1-4799-6013-2

FDPs Attended

·         Applications of Mathematics held at Rajagiri from December 3 to 16, 2012.
·         Enhanced teaching methods Using Moodle held at Rajagiri from 10, 16 th Dec 2013
 ·                       National Faculty Development Programme organized by EDII Kerala Office from 5th to 17th December 2016.
 
 

Workshops Attended

·         Software Defined Radio held at Rajagiri from May 14 to 16, 2013.
·         Cadence IC design Tool held at Rajagiri from November 4 to 5, 2013.
·         Labveiw held at Rajagiri from November 5 to 7, 2013.
·         Wireless Communications held at Rajagiri on 26th October, 2013.
·                           Workshop on Zynq based Embedded System Design at RSET from July 9th to 13th, 2018

Personal Details 

Date of Birth: 30th may 1988.
Gender/Marital Status: Male/ Married.
Languages known: English, Hindi, Malayalam.

  Passport No: H3589639

Permanent Address                                                

Muraleesadanam,                                                   

Thevalappuram(p.o),

Puthoor,Kottarakara - 691507.                                             

·         An efficient way to implement Scalar Multiplication in Elliptic Curve Cryptography, IJERT Special Issue 2017, ISSN: 2278-0181
·         A body biased adiabatic dynamic differential logic(BADDL) to prevent DPA attacks in smart cards, IEEE ISBN: 978-1-5386-2745-7
·         Design of graphics processing unit for image processing, IEEE ISBN: 978-1-4799-6013-2

CV upload: 

dhanesh_m_s_resume.pdf

(Last updated: November 27, 2019)